Design and Implementation of Digital Loop Filter for ADPLL IP Core in 180nm SCL Technology

DOI

10.2991/978-94-6463-858-5_242How to use a DOI?

Keywords

Digital loop filter; PI control; ADPLL; 180nm SCL; noise suppression; Cadence

Abstract

This project focuses on the design and development of a digital loop filter for an All-Digital Phase- Locked Loop (ADPLL) implemented as an Intel- lectual Property (IP) core in SCL 180nm CMOS technology. The loop filter is a critical component of the ADPLL,it is responsible for stabilizing the system by managing the trade-off between dynamic response and noise suppression. Using Cadence digital design tools, the project entails the end-to-end implementation of the loop filter, including design, synthesis, and post simulation. Key design challenges include optimizing the proportional and integral gains to ensure robust performance under varying operating conditions to meet the constraints of the 180nm technology node. This project aims to achieve a high-performance ADPLL design with applications in communication systems. The work will be validated through comprehensive simulations, providing insights into the practical implementation of digital loop filters in ADPLL architectures.

Copyright

© 2025 The Author(s)

Open Access

Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

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TY  - CONF
AU  - Mohammed Rehan Sami
AU  - Krishna Reddy
AU  - Mohd Ziaud-Din Jahangir
AU  - Syed
AU  - Mohammed Ali
PY  - 2025
DA  - 2025/11/04
TI  - Design and Implementation of Digital Loop Filter for ADPLL IP Core in 180nm SCL Technology
BT  - Proceedings of International Conference on Computer Science and Communication Engineering (ICCSCE 2025)
PB  - Atlantis Press
SP  - 2881
EP  - 2887
SN  - 2352-538X
UR  - https://doi.org/10.2991/978-94-6463-858-5_242
DO  - 10.2991/978-94-6463-858-5_242
ID  - Sami2025
ER  -