Proceedings of the 2025 2nd International Conference on Mechanics, Electronics Engineering and Automation (ICMEEA 2025)

A Review on Device-Based Processing-In-Memory

Authors
Zimo Li1, *, Longxuan Li2, Boyi Wang3
1College of Electronic Science and Engineering, Jilin University, Changchun, 130012, China
2Computer School, Beijing Institute of Technology Zhuhai College, Zhuhai, 519088, China
3College of Artificial Intelligence, Shenyang Normal University, Shenyang, 110034, China
*Corresponding author. Email: lizm1923@mails.jlu.edu.cn
Corresponding Author
Zimo Li
Available Online 31 August 2025.
DOI
10.2991/978-94-6463-821-9_102How to use a DOI?
Keywords
Memory Wall; Processing-In-Memory; Devices
Abstract

To address the “memory wall” problem that limits the computing power of processors due to the traditional von Neumann architecture’s separation of storage and computation, the Processing-in-Memory architecture, which integrates storage and computation, has become a research hotspot in the current new computing architectures. The core idea of the memory-computation integration architecture is to break the traditional von Neumann bottleneck by directly processing data within the memory, thereby significantly reducing data transmission overhead and enhancing computing speed and energy efficiency. This architecture not only can solve the performance bottleneck faced by current computing systems but also provides a new technical path for emerging fields such as intelligent computing and edge computing. This paper first introduces the concept of memory-computation integration and focuses on elaborating different volatile and non-volatile storage devices. These include the principles and applications of SRAM, DRAM, PCM, MRAM, FLASH, and RRAM in the Processing-in-Memory field. Finally, it looks forward to the future development direction of Processing-in-Memory devices. It is expected that through the summary of the research progress of memory-in-operation-related devices, this paper can provide a reference for the development of memory-computation integration.

Copyright
© 2025 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

Download article (PDF)

Volume Title
Proceedings of the 2025 2nd International Conference on Mechanics, Electronics Engineering and Automation (ICMEEA 2025)
Series
Advances in Engineering Research
Publication Date
31 August 2025
ISBN
978-94-6463-821-9
ISSN
2352-5401
DOI
10.2991/978-94-6463-821-9_102How to use a DOI?
Copyright
© 2025 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

Cite this article

TY  - CONF
AU  - Zimo Li
AU  - Longxuan Li
AU  - Boyi Wang
PY  - 2025
DA  - 2025/08/31
TI  - A Review on Device-Based Processing-In-Memory
BT  - Proceedings of the 2025 2nd International Conference on Mechanics, Electronics Engineering and Automation (ICMEEA 2025)
PB  - Atlantis Press
SP  - 1053
EP  - 1062
SN  - 2352-5401
UR  - https://doi.org/10.2991/978-94-6463-821-9_102
DO  - 10.2991/978-94-6463-821-9_102
ID  - Li2025
ER  -