A Survey of Efficient CNN Hardware Acceleration Technologies for Edge Computing

DOI

10.2991/978-94-6463-821-9_78How to use a DOI?

Keywords

Edge computing; convolutional neural networks (CNNS); hardware acceleration; model compression

Abstract

With the rapid development of edge computing, the deployment of convolutional neural networks (CNNs) on edge devices has become increasingly necessary to meet the demand for intelligent applications. However, edge devices are often constrained by limited computing resources, storage capacity, and strict power consumption requirements. These challenges make the design of efficient CNN models and advanced hardware acceleration technologies critical research areas. This paper focuses on these two aspects and provides an overview. Firstly, it introduces model compression techniques to reduce the computational complexity and storage of CNNs. Both structured pruning, which removes entire filters or layers, and unstructured pruning, which eliminates individual weights, are discussed. Lightweight network architectures, such as the MobileNet series, are also highlighted as efficient solutions for balancing performance and resource use. Secondly, the paper examines CNN hardware acceleration technologies, emphasizing platforms like Field-Programmable Gate Arrays (FPGAs) and Application-Specific Integrated Circuits (ASICs), which enhance performance and energy efficiency. Finally, this paper summarizes the current progress in these fields and discusses future research directions, focusing on balancing accuracy, efficiency, and hardware constraints to optimize CNN deployment on edge devices.

Copyright

© 2025 The Author(s)

Open Access

Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

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TY  - CONF
AU  - Rui Cao
AU  - Jinrun Tian
PY  - 2025
DA  - 2025/08/31
TI  - A Survey of Efficient CNN Hardware Acceleration Technologies for Edge Computing
BT  - Proceedings of the 2025 2nd International Conference on Mechanics, Electronics Engineering and Automation (ICMEEA 2025)
PB  - Atlantis Press
SP  - 808
EP  - 815
SN  - 2352-5401
UR  - https://doi.org/10.2991/978-94-6463-821-9_78
DO  - 10.2991/978-94-6463-821-9_78
ID  - Cao2025
ER  -