Proceedings of the 2025 2nd International Conference on Mechanics, Electronics Engineering and Automation (ICMEEA 2025)

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Design and Optimization of Two-Stage CMOS Amplifier

Authors
Yongqi Fang1, *
1School of Advanced Technology, Xi’an Jiaotong-Liverpool University, Suzhou, 215000, China
*Corresponding author. Email: Yongqi.Fang22@student.xjtlu.edu.cn
Corresponding Author
Yongqi Fang
Available Online 31 August 2025.
DOI
10.2991/978-94-6463-821-9_45How to use a DOI?
Keywords
Two-Stage CMOS Amplifier; High Gain; Low Power Consumption; Phase Margin; Capacitance Compensation
Abstract

The two-stage Complementary Metal Oxide Semiconductor (CMOS) amplifier features high gain, low power consumption and excellent stability, playing an irreplaceable role in modern communication, audio processing and other fields. This paper designs and analyses a CMOS two-stage amplifier that meets specific performance indicators, including a direct current (DC) gain greater than 80 dB, a -3 dB bandwidth of 3 kHz, and a total current consumption not exceeding 6μA. By adopting a cascade of common-source amplifiers, current-mirror biasing, and a differential input topology, the gain and linearity of the amplifier have been enhanced. Capacitance compensation technology has also been employed to optimize the phase margin to 83.03°, far exceeding the stability requirement of 40°. According to the simulation results, this amplifier effectively resolves the issues of gain and power consumption limitations, while achieving a strong phase margin and bandwidth control, making it a feasible option for low-power and high-gain applications. The theoretical values are compared with actual data. Finally, the paper points out the improvement of the two-stage CMOS amplifier, and the prospect of future development is presented.

Copyright
© 2025 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

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Volume Title
Proceedings of the 2025 2nd International Conference on Mechanics, Electronics Engineering and Automation (ICMEEA 2025)
Series
Advances in Engineering Research
Publication Date
31 August 2025
ISBN
978-94-6463-821-9
ISSN
2352-5401
DOI
10.2991/978-94-6463-821-9_45How to use a DOI?
Copyright
© 2025 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

Cite this article

risenwbib
TY  - CONF
AU  - Yongqi Fang
PY  - 2025
DA  - 2025/08/31
TI  - Design and Optimization of Two-Stage CMOS Amplifier
BT  - Proceedings of the 2025 2nd International Conference on Mechanics, Electronics Engineering and Automation (ICMEEA 2025)
PB  - Atlantis Press
SP  - 436
EP  - 444
SN  - 2352-5401
UR  - https://doi.org/10.2991/978-94-6463-821-9_45
DO  - 10.2991/978-94-6463-821-9_45
ID  - Fang2025
ER  -