Computer Aided Computational Intelligence Design Environment for Automated Analog Circuit
- DOI
- 10.2991/978-94-6239-707-1_11How to use a DOI?
- Keywords
- Optimization; TLBO Algorithm; GWO Algorithm
- Abstract
The design of CMOS based analog circuits has become progressively more challenging as device scaling advances. The transistor sizing strongly influences the performance metrics such as power dissipation, silicon area, unity gain bandwidth, slew rate, and open loop gain. This makes an analog circuit design a multi objective optimization problem. Conventional analytical design methods, which rely on simplified transistor level models are frequently struggle to identify globally optimal solutions. Which makes analog circuit design a highly nonlinear and high dimensional engineering design problem. To address these limitations, metaheuristic optimization techniques are very successful due explore complex search space effectively and handle multiple objectives simultaneously. In this study, a two stage operational amplifier designed in the BSIM4 model with 130 nm technology node optimized for the required specifications. The circuit level simulations are carried out in Ngspice-26 circuit simulator. The optimization employing optimization algorithms: Grey Wolf Optimization (GWO) and Teaching Learning Based Optimization (TLBO). These algorithms were implemented using Python language and the simulations were executed on an AMD Ryzen™ based system with 16 GB RAM running a 64-bit Ubuntu operating environment. The two-stage operational amplifier optimized to achieves an open loop gain of 82.02 dB, 80.65 dB, a unity gain-bandwidth of 391 MHz, 388 MHz, CMRR of 76.36 dB, 83.69 dB and a low power consumption of 19.8 μW, 18.3 μW respectively for the GWO and TLBO algorithms. These results show both algorithms are achieved the majority of the required specifications and implemented in the automated analog circuit design framework to optimize the analog circuit design.
- Copyright
- © 2026 The Author(s)
- Open Access
- Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.
Cite this article
TY - CONF AU - Suresh Bharvad AU - Pankaj Prajapati AU - Devendra Patel PY - 2026 DA - 2026/06/18 TI - Computer Aided Computational Intelligence Design Environment for Automated Analog Circuit BT - Proceedings of the International Conference on Recent Advances in Intelligent and Sustainable Technologies (RAIST 2026) PB - Atlantis Press SP - 122 EP - 131 SN - 2589-4919 UR - https://doi.org/10.2991/978-94-6239-707-1_11 DO - 10.2991/978-94-6239-707-1_11 ID - Bharvad2026 ER -