Proceedings of the 2025 2nd International Conference on Electrical Engineering and Intelligent Control (EEIC 2025)

Applications of Absolute Value Detectors in Neuromorphic and Signal Processing Systems

Authors
Dongping Huang1, *
1University of California Irvine, Irvine, CA, 92696, USA
*Corresponding author. Email: dongpinh@uci.edu
Corresponding Author
Dongping Huang
Available Online 23 October 2025.
DOI
10.2991/978-94-6463-864-6_35How to use a DOI?
Keywords
Absolute‑Value Detector; Spike Sorting; Neuromorphic Pre‑Processing; Low‑Power Cmos; Digital Signal Processing
Abstract

The four‑bit absolute‑value detector (AVD) is an indispensable primitive wherever signed sensor data must be reduced to magnitude before thresholding, from cortical implants to wearable audio codecs. Yet the seemingly trivial operation hides a rich three‑way trade‑off among delay, energy and area that becomes critical in edge devices operating under sub‑milliwatt power budgets. This review first synthesises two decades of AVD research, cataloguing twenty representative CMOS, pass‑transistor and logic‑in‑memory implementations and benchmarking them with a unified energy–delay metric. Building on these insights this paper introduces an optimised 4‑bit AVD that applies logical‑effort path balancing and supply‑voltage scaling to cut energy by 4.6 × while meeting a 1.5 × ‑minimum‑delay target; transistor‑level LTspice and Python models are provided for reproducibility. The paper then analyses how design choices map onto system‑level constraints in neuromorphic spike‑sorting front‑ends and conventional digital signal‑processing pipelines. Finally, unresolved challenges—including programmable thresholds, asynchronous handshake overhead and thermal issues in 3‑D monolithic integration—are discussed to guide future research.

Copyright
© 2025 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

Download article (PDF)

Volume Title
Proceedings of the 2025 2nd International Conference on Electrical Engineering and Intelligent Control (EEIC 2025)
Series
Advances in Engineering Research
Publication Date
23 October 2025
ISBN
978-94-6463-864-6
ISSN
2352-5401
DOI
10.2991/978-94-6463-864-6_35How to use a DOI?
Copyright
© 2025 The Author(s)
Open Access
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

Cite this article

TY  - CONF
AU  - Dongping Huang
PY  - 2025
DA  - 2025/10/23
TI  - Applications of Absolute Value Detectors in Neuromorphic and Signal Processing Systems
BT  - Proceedings of the 2025 2nd International Conference on Electrical Engineering and Intelligent Control (EEIC 2025)
PB  - Atlantis Press
SP  - 362
EP  - 377
SN  - 2352-5401
UR  - https://doi.org/10.2991/978-94-6463-864-6_35
DO  - 10.2991/978-94-6463-864-6_35
ID  - Huang2025
ER  -