A FinFET-Based Hysteresis Comparator for High-Speed and Low-Power ADC

DOI

10.2991/978-94-6463-858-5_213How to use a DOI?

Keywords

Comparator; slewrate; Delay Time; offsetvoltage; Noise margin

Abstract

Comparators are essential in analog and mixed signal applications because they compare inputs and provide the appropriate output. In this paper various comparator types of open loop, dynamic latch, preamplifier latch, and hysteresis comparator are compared using CMOS and FinFET technology. Analyzing their DC and transient analysis of the comparator in Synopsys Custom Compiler tool. Slew rate, delay duration, offset voltage and noise immunity are used to examine the comparators. FinFET comparators are more suited for high-speed applications because of the improved slew rates and improved dynamic latch comparator, which goes from 25 V/ns (CMOS) to 37.5 V/ns (FinFET). High-accuracy applications benefit greatly from the Open-Loop Comparator’s ability to lower offset voltage from 8 mV (CMOS) to 5 mV (FinFET), which improves precision. The noise margin of the Preamplifier Latch Comparator increases from 500 mV to 600 mV, increasing its resilience to noise and dependability in noisy settings. Additionally, the delay time of the Dynamic Latch Comparator decreases from 0.15 ns (CMOS) to 0.1 ns (FinFET), indicating that all comparator types gain from shorter delay durations. FinFET technology generally improves speed, accuracy, noise immunity, and reaction time, greatly increasing the comparators’ reliability and efficiency for high-performance applications.

Copyright

© 2025 The Author(s)

Open Access

Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International License (http://creativecommons.org/licenses/by-nc/4.0/), which permits any noncommercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made.

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TY  - CONF
AU  - Chokkakula Ganesh
AU  - L. Padma Sree
AU  - Govindu Vikas
PY  - 2025
DA  - 2025/11/04
TI  - A FinFET-Based Hysteresis Comparator for High-Speed and Low-Power ADC
BT  - Proceedings of International Conference on Computer Science and Communication Engineering (ICCSCE 2025)
PB  - Atlantis Press
SP  - 2564
EP  - 2578
SN  - 2352-538X
UR  - https://doi.org/10.2991/978-94-6463-858-5_213
DO  - 10.2991/978-94-6463-858-5_213
ID  - Ganesh2025
ER  -